The increase of power needs in SoC is bound to both the computation and memory resources needs. Today applications, have to manipulate a large volume of data so, this increases the activity on the communication links (busses, interconnects). This increase of the activity also leads an increase of both the power/energy consumption and the propagation time. Data provided by the industry, show that the interconnect consumption can represent up to 60% of the whole SoC consumption and the propagation time of wires is higher than of gates.

To optimize these parameters, several works use coding techniques whose the goal is to decrease the interconnect activity. The main problem of these techniques (bus invert for instance) is that the improvement obtain on the bus consumption is compensated for, surely often exceeded by the codec consumption. So in most case, the state of the art techniques are not suitable or only for very long wires (several centimeter; not acceptable for SoC).

The patented technique Spatial Switching, aims to optimize both consumption & propagation time even when the codec consumption is taken into account.